In example scenario, certain microcontrollers can be configured to communicate with a variety of peripherals using a variety of communication protocols. The peripherals can compete for access to a system bus for communicating with the microcontroller and may be capable of operating with respect to different levels of quality-of-service (QoS). If multiple peripherals are simultaneously operating it may be useful to perform a specific peripheral transaction (e.g., a memory read transaction) before performing another peripheral transaction. Indeed, in an embodiment, a ranking or priority algorithm may be implemented to accurately determine the appropriate ranking or priority level for each transaction.
In one example scenario, a “round robin” strategy may be implemented that provides each bus channel an equal part of the system bus bandwidth and ensures that no single channel is denied access for a relatively long period of time. In accordance with an example implementation, however, the system bus bandwidth may be granted to relatively low priority or non-critical bus channels when high-priority or critical bus channels are requesting data transfer.